Obvious answer frontend verification engineer will give is when Functional Coverage matrix is 100% achieved as well as required code coverage is achieved (B,S,T,FSM - most frequently used).
To add to this one can answer When STA is done ensuring that timing constraint is met.Also since STA is done by mentioning some paths as ...*.... it is possible accidently we decalre some relevant path as false path , SO GLS is also prefred
Ans : Function Matrix/Code coverage matrix + STA + GLS (if not possible for all testcase at least for high priprity features)
Refer :
1> Code Coverage & Functional Coverage - ( http://verificationwithjigar.blogspot.com/2010/04/code-coverage-functional-coverage.html )
2> STA/Formal Verification Vs. Gatelevel ( http://verificationwithjigar.blogspot.com/2010/08/staformal-verification-vs-gatelevel.html )
Comments are welcomed.
Jigar,
ReplyDeleteDo you use formal verification to verify your design where you can explore the design functionality without creating a testbench or running simulations?
Alok
No. You have to have TB/run test cases.
ReplyDeleteFormal is equivalence check that says RTL sim behavior = Syntheses net list by using mathematical model